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1

A battery-less BLE smart sensor for room occupancy tracking supplied by 2.45-GHz wireless power transfer

Dekimpe, Rémi, Xu, Pengcheng, Schramme, Maxime, Gérard, Pierre, Flandre, Denis, Bol, David

Journal:

Integration, the VLSI Journal

Année:

2019

Langue:

english

Fichier:

PDF, 2.20 MB

english, 2019

2

Wide frequency band assessment of 28nm FDSOI technology platform for analogue and RF applications

Makovejev, S., Kazemi Esfeh, B., Barral, V., Planes, N., Haond, M., Flandre, D., Raskin, J.-P., Kilchytska, V.

Journal:

Solid-State Electronics

Année:

2015

Langue:

english

Fichier:

PDF, 1.45 MB

english, 2015

3

Comparison of self-heating effect in GAA and SOI mosfets

P. Francis, J.P. Colinge, D. Flandre

Journal:

Microelectronics Reliability

Année:

1997

Langue:

english

Fichier:

PDF, 721 KB

english, 1997

4

Magnetic-field sensor based on a thin-film SOI transistor

Pere Losantos, Carles Cané, Denis Flandre, Jean-Paul Eggermont

Journal:

Sensors and Actuators A: Physical

Année:

1998

Langue:

english

Fichier:

PDF, 671 KB

english, 1998

5

A modifiedgm/IDdesign methodology for deeply scaled CMOS technologies

Pollissard-Quatremère, Guillaume, Gosset, Geoffroy, Flandre, Denis

Journal:

Analog Integrated Circuits and Signal Processing

Année:

2014

Langue:

english

Fichier:

PDF, 1.55 MB

english, 2014

6

A Sizing Methodology for On-Chip Switched-Capacitor DC/DC Converters

De Vos, Julien, Flandre, Denis, Bol, David

Journal:

IEEE Transactions on Circuits and Systems I: Regular Papers

Année:

2014

Langue:

english

Fichier:

PDF, 2.24 MB

english, 2014

7

Gate leakage currents model for FinFETs implemented in Verilog-A for electronic circuits design

Garduño, Salvador I., Alvarado, Joaquín, Cerdeira, Antonio, Estrada, Magali, Kilchytska, Valeriya, Flandre, Denis

Journal:

International Journal of Numerical Modelling: Electronic Networks, Devices and Fields

Année:

2014

Langue:

english

Fichier:

PDF, 1.89 MB

english, 2014

8

[IEEE ESSDERC 2017 - 47th IEEE European Solid-State Device Research Conference (ESSDERC) - Leuven, Belgium (2017.9.11-2017.9.14)] 2017 47th European Solid-State Device Research Conference (ESSDERC) - Back-gate bias effect on UTBB-FDSOI non-linearity performance

Esfeh, B. Kazemi, Kilchytska, V., Parvais, B., Planes, N., Haond, M., Flandre, D., Raskin, J.-P.

Année:

2017

Langue:

english

Fichier:

PDF, 2.18 MB

english, 2017

9

[IEEE 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) - Burlingame, CA, USA (2018.10.15-2018.10.18)] 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) - 8-T ULV SRAM macro in 28nm FDSOI with 7.4 pW/bit retention power and back-biased-scalable speed/energy trade-off

Haine, Thomas, Flandre, Denis, Bol, David

Année:

2018

Fichier:

PDF, 6 KB

2018

10

A 2.24-pJ/bit 2.5-Gb/s UWB receiver in 28-nm FDSOI CMOS for low-energy chip-to-chip communications

Gimeno, Cecilia, Flandre, Denis, Schramme, Maxime, Frenkel, Charlotte, Bol, David

Journal:

AEU - International Journal of Electronics and Communications

Année:

2020

Langue:

english

Fichier:

PDF, 2.29 MB

english, 2020

11

Subthreshold slope of long-channel, accumulation-mode p-channel SOI MOSFETs

J.P. Colinge, D. Flandre, F. Van de Wiele

Journal:

Solid-State Electronics

Année:

1994

Langue:

english

Fichier:

PDF, 404 KB

english, 1994

12

Measurement and modeling of thin-film accumulation-mode SOI p-MOSFET intrinsic gate capacitances

B. Gentinne, D. Flandre, J.-P. Colinge

Journal:

Solid-State Electronics

Année:

1996

Langue:

english

Fichier:

PDF, 791 KB

english, 1996

13

Physics and performances of accumulation-mode SOI p-MOSFET's from low (77 K) to high (150–320°C) temperatures

D. Flandre, A. Terao, T. Loo, J.-P. Colinge

Journal:

Microelectronic Engineering

Année:

1992

Langue:

english

Fichier:

PDF, 234 KB

english, 1992

14

Compact model for single event transients and total dose effects at high temperatures for partially depleted SOI MOSFETs

J. Alvarado, E. Boufouss, V. Kilchytska, D. Flandre

Journal:

Microelectronics Reliability

Année:

2010

Langue:

english

Fichier:

PDF, 723 KB

english, 2010

15

New experiments on the electrodeposition of iron in porous silicon

C Renaux, V Scheuren, D Flandre

Journal:

Microelectronics Reliability

Année:

2000

Langue:

english

Fichier:

PDF, 240 KB

english, 2000

16

SOI-CMOS compatible low-power gas sensor using sputtered and drop-coated metal-oxide active layers

P. Ivanov, J. Laconte, J. P. Raskin, M. Stankova, E. Sotter, E. Llobet, X. Vilanova, D. Flandre, X. Correig

Journal:

Microsystem Technologies

Année:

2005

Langue:

english

Fichier:

PDF, 617 KB

english, 2005

17

Fully integrated blue/UV SOI CMOS photosensor for biomedical and environmental applications

Olivier Bulteel, Aryan Afzalian, Denis Flandre

Journal:

Analog Integrated Circuits and Signal Processing

Année:

2010

Langue:

english

Fichier:

PDF, 365 KB

english, 2010

18

Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits

D. Flandre, J. P. Colinge, J. Chen, D. De Ceuster, J. P. Eggermont, L. Ferreira, B. Gentinne, P. G. A. Jespers, A. Viviani, R. Gillon, J. P. Raskin, A. Vander Vorst, D. Vanhoenacker-Janvier, F. Silvei

Journal:

Analog Integrated Circuits and Signal Processing

Année:

1999

Langue:

english

Fichier:

PDF, 283 KB

english, 1999

19

Equilibre nutritionnel de l'alimentation de la population adulte résidant

Martine Bernstein, Alfredo Morabia, Michael C. Costanza, J. Richard Landis, Alan Ross, Philippe Flandre, Ba Lau Luong, Shriki Kumanyika, Ann Sorenson, Russel Localio

Journal:

International Journal of Public Health

Année:

1994

Fichier:

PDF, 7.93 MB

1994

20

Advantages of the graded-channel SOI FD MOSFET for application as a quasi-linear resistor

Cerdeira, A., Aleman, M.A., Pavanello, M.A., Martino, J.A., Vancaillie, L., Flandre, D.

Journal:

IEEE Transactions on Electron Devices

Année:

2005

Langue:

english

Fichier:

PDF, 484 KB

english, 2005

21

Improved synthesis of gain-boosted regulated-cascode CMOS stages using symbolic analysis and gm/ID methodology

Flandre, D., Viviani, A., Eggermont, J.-P., Gentinne, B., Jespers, P.G.A.

Journal:

IEEE Journal of Solid-State Circuits

Année:

1997

Langue:

english

Fichier:

PDF, 260 KB

english, 1997

22

[IEEE 2012 3rd IEEE International Workshop on Low Temperature Bonding for 3D Integration (LTB-3D) - Tokyo, Japan (2012.05.22-2012.05.23)] 2012 3rd IEEE International Workshop on Low Temperature Bonding for 3D Integration - Low temperature assembly method of microfluidic bio-molecules detection device

van Loo, S., Stoukatch, S., Axisa, F., Destine, J., Van Overstraeten-Schlogel, N., Flandre, D., Lefevre, O., Mertens, P.

Année:

2012

Langue:

english

Fichier:

PDF, 2.52 MB

english, 2012

23

Diamond layout style impact on SOI MOSFET in high temperature environment

Gimenez, Salvador Pinillos, Galembeck, Egon Henrique Salerno, Renaux, Christian, Flandre, Denis

Journal:

Microelectronics Reliability

Année:

2015

Langue:

english

Fichier:

PDF, 659 KB

english, 2015

24

Highly reflective rear surface passivation design for ultra-thin Cu(In,Ga)Se2 solar cells

Vermang, Bart, Wätjen, Jörn Timo, Fjällström, Viktor, Rostvall, Fredrik, Edoff, Marika, Gunnarsson, Rickard, Pilch, Iris, Helmersson, Ulf, Kotipalli, Ratan, Henry, Frederic, Flandre, Denis

Journal:

Thin Solid Films

Année:

2015

Langue:

english

Fichier:

PDF, 748 KB

english, 2015

25

Impact of Using the Octagonal Layout for SOI MOSFETs in High Temperature Environment

S. Gimenez, E. Galembeck, C. Renaux, D. Flandre

Année:

2015

Langue:

english

Fichier:

PDF, 1.72 MB

english, 2015

26

Large Sample Theory for Schemper's Measures of Explained Variation in the Cox Regression Model

John O'Quigley, Philippe Flandre and Ethan Reiner

Journal:

Journal of the Royal Statistical Society: Series D (The Statistician)

Année:

1999

Langue:

english

Fichier:

PDF, 883 KB

english, 1999

27

Quantum Efficiency Improvement of SOI p-i-n Lateral Diodes Operating as UV Detectors at High Temperatures

Novo, Carla, Buhler, Rudolf, Baptista, Joao, Giacomini, Renato, Afzalian, Aryan, Flandre, Denis

Journal:

IEEE Sensors Journal

Année:

2017

Langue:

english

Fichier:

PDF, 771 KB

english, 2017

28

Boosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environment

Galembeck, Egon Henrique Salerno, Renaux, Christian, Flandre, Denis, Finco, Saulo, Gimenez, Salvador Pinillos

Journal:

IEEE Transactions on Device and Materials Reliability

Année:

2017

Langue:

english

Fichier:

PDF, 815 KB

english, 2017

29

Optimisation of rear reflectance in ultra-thin CIGS solar cells towards >20% efficiency

Poncelet, Olivier, Kotipalli, Ratan, Vermang, Bart, Macleod, Angus, Francis, Laurent A., Flandre, Denis

Journal:

Année:

2017

Langue:

english

Fichier:

PDF, 1.43 MB

english, 2017

30

Intrinsic rectification in common-gated graphene field-effect transistors

Haddad, Pierre-Antoine, Flandre, Denis, Raskin, Jean-Pierre

Journal:

Année:

2017

Langue:

english

Fichier:

PDF, 1.15 MB

english, 2017

31

[IEEE 2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) - Granada, Spain (2018.3.19-2018.3.21)] 2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) - Design benefits of self-cascode configuration for analog applications in 28 FDSOI

d'Oliveira, Ligia, de Souza, Michelly, Kilchytska, Valeriya, Flandre, Denis

Année:

2018

Langue:

english

Fichier:

PDF, 406 KB

english, 2018

32

[IEEE 2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) - Platja d'Aro, Spain (2018.7.2-2018.7.4)] 2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) - A Battery-Less BLE IoT Motion Detector Supplied by 2.45-GHz Wireless Power Transfer

Dekimpe, Remi, Xu, Pengcheng, Schramme, Maxime, Flandre, Denis, Bol, David

Année:

2018

Langue:

english

Fichier:

PDF, 660 KB

english, 2018

33

Implementation of the symmetric doped double-gate MOSFET model in Verilog-A for circuit simulation

Joaquín Alvarado, Benjamin Iñiguez, Magali Estrada, Denis Flandre, Antonio Cerdeira

Journal:

International Journal of Numerical Modelling: Electronic Networks, Devices and Fields

Année:

2010

Langue:

english

Fichier:

PDF, 374 KB

english, 2010

34

Moderate inversion model of ultrathin double-gate nMOS/SOI transistors

P. Francis, A. Terao, D. Flandre, F. Van de Wiele

Journal:

Solid-State Electronics

Année:

1995

Langue:

english

Fichier:

PDF, 548 KB

english, 1995

35

Effective mobility in FinFET structures with HfO2 and SiON gate dielectrics and TaN gate electrode

T. Rudenko, N. Collaert, S. De Gendt, V. Kilchytska, M. Jurczak, D. Flandre

Journal:

Microelectronic Engineering

Année:

2005

Langue:

english

Fichier:

PDF, 156 KB

english, 2005

36

Thin films stress extraction using micromachined structures and wafer curvature measurements

J. Laconte, F. Iker, S. Jorez, N. André, J. Proost, T. Pardoen, D. Flandre, J.-P. Raskin

Journal:

Microelectronic Engineering

Année:

2004

Langue:

english

Fichier:

PDF, 369 KB

english, 2004

37

Impact of neutron irradiation on the RF properties of oxidized high-resistivity silicon substrates with and without a trap-rich passivation layer

C. Roda Neve, V. Kilchytska, J. Alvarado, D. Lederer, O. Militaru, D. Flandre, J.-P. Raskin

Journal:

Microelectronics Reliability

Année:

2011

Langue:

english

Fichier:

PDF, 733 KB

english, 2011

38

Composite ULP diode fabrication, modelling and applications in multi-Vth FD SOI CMOS technology

David Levacq, Christophe Liber, Vincent Dessard, Denis Flandre

Journal:

Solid-State Electronics

Année:

2004

Langue:

english

Fichier:

PDF, 418 KB

english, 2004

39

LDMOS in SOI technology with very-thin silicon film

M. Bawedin, C. Renaux, D. Flandre

Journal:

Solid-State Electronics

Année:

2004

Langue:

english

Fichier:

PDF, 561 KB

english, 2004

40

A charge-based continuous model for submicron graded-channel nMOSFET for analog circuit simulation

Michelly de Souza, Marcelo Antonio Pavanello, Benjamín Iñíguez, Denis Flandre

Journal:

Solid-State Electronics

Année:

2005

Langue:

english

Fichier:

PDF, 469 KB

english, 2005

41

Thin film fully-depleted SOI four-gate transistors

K. Akarvardar, S. Cristoloveanu, M. Bawedin, P. Gentil, B.J. Blalock, D. Flandre

Journal:

Solid-State Electronics

Année:

2007

Langue:

english

Fichier:

PDF, 1.00 MB

english, 2007

42

The low-frequency noise behaviour of graded-channel SOI nMOSFETs

E. Simoen, C. Claeys, T.M. Chung, D. Flandre, M.A. Pavanello, J.A. Martino, J.-P. Raskin

Journal:

Solid-State Electronics

Année:

2007

Langue:

english

Fichier:

PDF, 271 KB

english, 2007

43

Planar double-gate SOI MOS devices: Fabrication by wafer bonding over pre-patterned cavities and electrical characterization

T.M. Chung, B. Olbrechts, U. Södervall, S. Bengtsson, D. Flandre, J.-P. Raskin

Journal:

Solid-State Electronics

Année:

2007

Langue:

english

Fichier:

PDF, 1.30 MB

english, 2007

44

Compact model for highly-doped double-gate SOI MOSFETs targeting baseband analog applications

Oana Moldovan, Antonio Cerdeira, David Jiménez, Jean-Pierre Raskin, Valeria Kilchytska, Denis Flandre, Nadine Collaert, Benjamin Iñiguez

Journal:

Solid-State Electronics

Année:

2007

Langue:

english

Fichier:

PDF, 339 KB

english, 2007

45

Electrical characterization of true Silicon-On-Nothing MOSFETs fabricated by Si layer transfer over a pre-etched cavity

V. Kilchytska, T.M. Chung, B. Olbrechts, Ya. Vovk, J.-P. Raskin, D. Flandre

Journal:

Solid-State Electronics

Année:

2007

Langue:

english

Fichier:

PDF, 265 KB

english, 2007

46

Reduction of gate-to-channel tunneling current in FinFET structures

T. Rudenko, V. Kilchytska, N. Collaert, M. Jurczak, A. Nazarov, D. Flandre

Journal:

Solid-State Electronics

Année:

2007

Langue:

english

Fichier:

PDF, 292 KB

english, 2007

47

Advantages of graded-channel SOI nMOSFETs for application as source-follower analog buffer

Michelly de Souza, Denis Flandre, Marcelo Antonio Pavanello

Journal:

Solid-State Electronics

Année:

2008

Langue:

english

Fichier:

PDF, 293 KB

english, 2008

48

Building ultra-low-power high-temperature digital circuits in standard high-performance SOI technology

David Bol, Julien De Vos, Renaud Ambroise, Denis Flandre, Jean-Didier Legat

Journal:

Solid-State Electronics

Année:

2008

Langue:

english

Fichier:

PDF, 340 KB

english, 2008

49

Dynamic body potential variation in FD SOI MOSFETs operated in deep non-equilibrium regime: Model and applications

M. Bawedin, S. Cristoloveanu, D. Flandre, F. Udrea

Journal:

Solid-State Electronics

Année:

2010

Langue:

english

Fichier:

PDF, 1.15 MB

english, 2010

50

Experimental study of transconductance and mobility behaviors in ultra-thin SOI MOSFETs with standard and thin buried oxides

T. Rudenko, V. Kilchytska, S. Burignat, J.-P. Raskin, F. Andrieu, O. Faynot, Y. Le Tiec, K. Landry, A. Nazarov, V.S. Lysenko, D. Flandre

Journal:

Solid-State Electronics

Année:

2010

Langue:

english

Fichier:

PDF, 915 KB

english, 2010